1. Field of the Invention
The present invention relates to a thin film transistor substrate of a liquid crystal display panel using polysilicon, and more particularly to a polysilicon thin film transistor substrate reduces the number of processing steps without any process defects, and a fabricating method thereof.
2. Discussion of the Related Art
Generally, a liquid crystal display LCD device has liquid crystal cells that are arranged in a matrix in a liquid crystal display panel to control the light transmittance of the liquid crystal in accordance with a video signal to display a picture.
A thin film transistor (hereinafter, referred to as “TFT”) is used as a switch device to independently supply a video signal to each of the liquid crystal cells. Amorphous silicon or polysilicon is used as an active layer for the TFT. When using polysilicon, in which the charge mobility is approximately 100 times as fast as amorphous silicon, a drive circuit with a high response speed may be embedded in the liquid crystal display panel.
The polysilicon liquid crystal display panel includes a TFT substrate, in which the drive circuit is formed together with the TFT, and a color filter substrate, in which the color filter is formed, with liquid crystal therebetween.
FIG. 1 is a plan view illustrating part of a polysilicon TFT substrate, and FIG. 2 is a sectional diagram illustrating the TFT substrate shown in FIG. 1, taken along the line I-I′.
The TFT substrate shown in FIGS. 1 and 2 includes a TFT 30 connected to a gate line 2 and a data line 4, and a pixel electrode 22 connected to the TFT 30. The TFT 30 is formed as an N-type or P-type, but the case of being formed as the N-type is only explained below.
The TFT 30 includes a gate electrode 6 connected to the gate line 2, a source electrode included as part of the data line 4, and a drain electrode 10 connected to the pixel electrode 22 through a pixel contact hole 20 penetrating a passivation film 18. The gate electrode 6 overlaps a channel area 14C of an active layer 14, which is formed on a buffer film 12, with a gate insulating film 16 therebetween. The source electrode and the drain electrode 10 are formed with an interlayer insulating film 26 between the gate electrode 6 and the source and drain electrodes. And the source electrode and the drain electrode 10 are respectively connected to a source area 14S and a drain area 14D of the active layer 14, into which n+ impurities are injected, through a source contact hole 24S and a drain contact hole 24D which penetrate the interlayer insulating film 26 and the gate insulating film 16.
The polysilicon TFT substrate is formed using six mask processes, as in FIGS. 3A to 3F.
Referring to FIG. 3A, a buffer film 12 is formed on a lower substrate 1, and the active layer 14 is formed thereon by a first mask process.
An amorphous silicon is deposited on the buffer film 12 and crystallized by a laser to produce polysilicon, and then the polysilicon is patterned by a photolithography process and an etching process using a first mask, thereby forming the active layer 14.
Referring to FIG. 3B, the gate insulating film 16 is formed on the buffer film 12 where the active layer 14 is formed, and the gate line 2 and the gate electrode 6 are formed thereon by a second mask process.
Next, N+ impurities are injected into a non-overlapping area of the active layer 14 using the gate electrode 6 as a mask, thereby forming the source area 14S and the drain area 14D of the active layer 14.
Referring to FIG. 3C, the interlayer insulating film 26 is formed on the gate insulating film 16 where the gate line 2 and the gate electrode 6 are formed, and the source and drain contact holes 24S, 24D penetrating the interlayer insulating film 26 and the gate insulating film 16 are formed by a third mask.
Referring to FIG. 3D, the data line 4 having the source electrode and the drain electrode 10 are formed on the interlayer insulating film 26 by a fourth mask process.
Referring to FIG. 3E, the passivation film 18, is formed on the interlayer insulating film 26 where the data line 4 and the drain electrode 10 are formed, and a pixel contact hole 20 penetrating the passivation film 18 to expose the drain electrode 10 is formed by a fifth mask process.
Referring to FIG. 3F, a transparent pixel electrode 22 is formed on the passivation film 18 by a sixth mask process.
In this way, the related art polysilicon TFT substrate is formed by the six mask processes, thus its fabricating processes are complicated. This is because one mask process includes many processes like a thin film deposition process, a cleaning process, a photolithography process, an etching process, a photo-resist peeling process, an inspection process, and so on. Accordingly, in order to reduce cost, a method is required so that the number of mask processes of the polysilicon TFT substrate are reduced without defect.